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analyticalengine:destructiveload [2015-04-20 22:19] – created raineranalyticalengine:destructiveload [2015-04-20 22:20] – typo rainer
Zeile 12: Zeile 12:
 Note that information is destructively readout with many types of storages, in particular core memory and dynamic RAM cells. However, the later solution was to provide one set of wheels for each ingress shaft, and write it back while the mill works, instead of duplicating the whole memory. With core memory, this did slow down the CPU, thus the memory was splitted in even and odd banks, slowing down the CPU only if two even or odd addresses where used in direct succession. Note that information is destructively readout with many types of storages, in particular core memory and dynamic RAM cells. However, the later solution was to provide one set of wheels for each ingress shaft, and write it back while the mill works, instead of duplicating the whole memory. With core memory, this did slow down the CPU, thus the memory was splitted in even and odd banks, slowing down the CPU only if two even or odd addresses where used in direct succession.
  
-The ENIAC with its decimal shift registers would have had the same problem, but instead of shifting down to zero and counting, it shifted up circulary and counted the number of places shifted out on top. This would have been possible for the AE too, by turing the toothed wheel (indicated by 3 in Fig.1 of Bromley) a hole circle, and using the turn of the axis A (indicated by 2) instead. Clearly this would be done differently, once seen to be useful. +The ENIAC with its decimal shift registers would have had the same problem, but instead of shifting down to zero and counting, it shifted up circulary and counted the number of places shifted out on top. This would have been possible for the AE too, by turing the toothed wheel (indicated by 3 in Fig.1 of Bromley) a whole circle, and using the turn of the axis A (indicated by 2) instead. Clearly this would be done differently, once seen to be useful. 

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